1. Field of the Invention
The present invention relates to a technique applied to and effective for a semiconductor device having a phase change memory cell formed using a phase change material such as chalcogenide.
2. Description of the Related Arts
Mobile devices represented by hand-held phones use a semiconductor memory such as a DRAM, SRAM, or flash memory. Although large in capacity, DRAMs are low in access speed. Conversely, SRAMs are high in access speed, whereas they are unsuitable for use as a large-capacity memory, since they require as many as four to six transistors per cell and are therefore difficult to integrate with high density.
Also, DRAMs and SRAMs require constantly continued electrical energization for data retention. In other words, both are volatile. Flash memories, however, are nonvolatile, so although they require no electrical energization for memory retention, memories of this type have drawbacks in that the maximum permissible number of their rewriting/erasing operations is limited to about 105 times and in that their rewriting speeds are several orders-of-magnitude lower than other memories. As described above, the three types of memories have the respective advantages and disadvantages, and currently, each type of memory is selectively used according to the particular features and characteristics of the memory.
If a universal memory is realized that combines the advantages of a DRAM, an SRAM, and a flash memory each, it is possible to integrate plural types of memories into one chip and thus to implement the miniaturization and functional sophistication of hand-held phones and other various mobile devices.
Additionally, there will be very significant impacts if all types of semiconductor memories become replaceable with a single type of memory. The requirements of a universal memory include: (1) an integration density (large capacity) comparable to that of a DRAM, (2) an access (read/write) speed as high as that of an SRAM, (3) nonvolatility equivalent to that of a flash memory, and (4) electric power consumption low enough to withstand compact-battery driving.
A phase change memory is currently catching the most attention among all nonvolatile memories of the next generation, called the universal memories. The phase change memory employs the chalcogenide material used in a CD-RW, a DVD, or other optical disks, and similarly to these media, the phase change memory stores data by utilizing the differences in characteristics between the crystal state and amorphous state of the memory. These differences exist in read/write methods: whereas CD-RWs and DVDs utilize the transmission and reflection of the light represented by laser light, the phase change memory writes in data using the Joule heat generated by an electric current, and reads out data according to a particular resistance difference due to a change in phase.
The principles of operation of the phase change memory (an abbreviated name of a semiconductor storage device: hereinafter, the same) are described below with reference to FIG. 3. When a chalcogenide material is amorphized, such a reset pulse is applied that causes the chalcogenide material to be rapidly quenched after it is heated to a melting point (glass transition point Tg) or more. The melting point is, for example, 600° C. The rapid-quenching time (t1) required is, for example, 2 nsec. When the chalcogenide material is crystallized, such a set pulse is applied that retains the temperature of the chalcogenide material at a crystallization temperature or more, and less than a melting point. The crystallization point is, for example, 400° C. The time (t2) required for the crystallization is, for example, 50 nsec.
A feature of the phase change memory is that since the chalcogenide material, depending on its crystal state, changes in resistance value by no less than two to three orders of magnitude and this resistance value is used as a signal, a high reading signal level can be obtained and this facilitates sensing operation and allows high-speed reading. Also, this memory has 1012 repetition cycles of rewritability, and other performance characteristics compensating for the drawbacks of flash memories. In addition, features such as low-voltage/low-power operability and the ease in embedding with logic circuit elements make this memory suitable for use as a mobile device.
An example of manufacturing processes for the phase change memory will be briefly described below using FIGS. 4 to 6 which are sectional process diagrams of major constituent elements. First, with reference to FIG. 4, a well-known manufacturing method is used to form a select transistor on a semiconductor substrate not shown. The select transistor includes, for example, an MOS transistor and a bipolar transistor. Next, a well-known manufacturing method is used to deposit an interlayer dielectric film A11 made of, for example, a silicon oxide film, and then form a plug A12 made of, for example, tungsten, inside the interlayer dielectric film A11. This plug functions to electrically connect a lower select transistor and an upper phase-change layer. Then, a chalcogenide layer A13 made of, for example, a germanium-antimony-tellurium (GeSbTe) mixture or alloy, an upper electrode A14 made of, for example, tungsten, and a hard mask A15 made of, for example, a silicon oxide film, are deposited in that order. This state is shown in FIG. 4. The film thickness of the chalcogenide layer A13 depends on the specifications of the resistance value read out as a signal. However, the layer A13 is formed with a film thickness of 100 nm, for example.
Next, as shown in FIG. 5, the hard mask A15, the upper electrode A14, and the chalcogenide layer A13 are patterned using a well-known lithographic method and dry-etching method.
Next depositing an interlayer dielectric film A16 is deposited such a state as shown in FIG. 6. After that, an interconnection layer for electrical connection to the upper electrode A14 is formed at the upper section of the interlayer dielectric film A16, and a plurality of interconnection layers are further formed at the upper section of the above interconnection layer in order to complete the phase change memory (not shown). When these processes are finished, a phase change memory cell is approximately completed. Information associated with this type of phase change memory cell is disclosed in, for example, the “Technical Digest of International Electron Devices Meeting, pages 803-806 (2001),” and information on the phase changes of chalcogenide materials is disclosed in, for example, the “Journal of Applied Physics, Vol. 87, Issue No. 9, page 4130, May 2000.”
Additionally, JP-A 11-514150 and JP-A 2001-502848 disclose the information given below. That is, in the phase change memories described in these Publications, a very small phase-change cell with an MOS transistor connected thereto is defined as a basic memory cell (one-bit), and information is recorded and erased by applying a pulse current to a phase change material and utilizing self-heating based on the resulting Joule heat. During the recording, the phase change material is crystallized by applying such a pulse current (set pulse) that heats the phase change material to a temperature region in which its rapid crystallization is achievable at a relatively low temperature. During the erasure, the phase change material is amorphized by applying such a pulse current (reset pulse) that causes the phase change material to be rapidly quenched after being heated to a high temperature. The phase change material has high electrical conductivity when in a crystal phase, and relatively low electrical conductivity when in an amorphous phase. During reading, a low voltage is applied to the phase change material and then the resulting electric current is converted into a voltage, whereby information is read.
The transistor reported by Mr. Hosaka et al. of Gunma University at the Symposium on Phase Changes, 2003, is known as a phase-change transistor (refer to (S, Hosaka, K. Miyauchi, T. Tamura, Y. Yin, and H. Sone: “Proposal of memory transistor using a phase change and nano-size effects for high density memory array; Proc. of PCOS2003, Shizuoka, Japan, pp. 52-55, 2003)). The crystallization of a chalcogenide film and the amorphization thereof causes the phase change memory to exhibit a memory action, and the same also applies to a phase change memory.